Intel S5520SC Dokumentacja Strona 48

  • Pobierz
  • Dodaj do moich podręczników
  • Drukuj
  • Strona
    / 192
  • Spis treści
  • BOOKMARKI
  • Oceniono. / 5. Na podstawie oceny klientów
Przeglądanie stron 47
Functional Architecture Intel® Workstation Board S5520SC TPS
Revision 1.7
Intel order number: E39530-010
34
3.3.11 Memory Error Handling
The BIOS classifies memory errors into the following categories:
Correctable ECC errors: This correction could be the result of an ECC correction, a
successfully retried memory cycle, or both.
Unrecoverable/Fatal ECC Errors: The ECC engine detects these errors but cannot
correct them.
Address Parity Errors: An Address Parity Error is logged as such in the SEL, but in all
other ways, is treated the same as an Uncorrectable ECC Error.
Przeglądanie stron 47
1 2 ... 43 44 45 46 47 48 49 50 51 52 53 ... 191 192

Komentarze do niniejszej Instrukcji

Brak uwag