Intel S5520SC Dokumentacja Pobierz pdf (Strona 148)

Design and Environmental Specifications Intel® Workstation Board S5520SC TPS

Revision 1.7

Intel order number: E39530-010

134

9.4.8 Timing Requirements

The following are the timing requirements for the power supply operation. The output voltages

must rise from 10% to within regulation limits (T

vout_rise

) within 5 ms to 70 ms. 5 VSB is allowed to

rise from 1.0 ms to 25 ms. +3.3 V, +5 V, and +12 V output voltages should start to rise

approximately at the same time. All outputs must rise monotonically. Each output voltage should

reach regulation within 50 ms (T

vout_on

) of each other during turn on of the power supply. Each

output voltage should fall out of regulation within 400 msec (T

vout_off

) of each other during turn off.

The following tables and diagrams show the timing requirements for the power supply being

turned on and off via the AC input with PSON held low, and the PSON signal with the AC input

applied.

Table 83. Output Voltage Timing

Item Description Minimum Maximum Units

vout_rise

Output voltage rise time from each main output. 5.0

vout_rise

All main outputs must be within regulation of each other within this

time.

N/A 50 ms

vout_rise

All main outputs must leave regulation within this time. N/A 400 ms

1. The 5 VSB output voltage rise time is from 1.0 ms to 25 ms.

TP02313

V out

vout_on

vout_rise

10% V out

vout_off

Figure 52. Output Voltage Timing

1 2 ... 143 144 145 146 147 148 149 150 151 152 153 ... 191 192

Brak uwag

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