Intel S5520SC Dokumentacja Strona 41

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Intel® Workstation Board S5520SC TPS Functional Architecture
Revision 1.7
Intel order number: E39530-010
27
DIMM Type
DIMM
Populated Per
Channel
Memory Running Frequency
(Y/N)
Command/Add
ress Rate
Ranks Per DIMM
SR: Single-Rank
DR: Dual-Rank
QR: Quad-Rank
Description
800MHz 1066MHz 1333MHz
w/ or w/o ECC
of processor IMCs and installed memory: 800
MHz, 1066 MHz , or 1333 MHz
UDIMM
w/ or w/o ECC
2 Y Y N 2N SR or DR
All UDIMMs run at 800 MHz or 1066 MHz
when two UDIMMs (Single- or Dual-Rank) are
installed in the same channel.
1N: One clock cycle for the DRAM commands arrive at the DIMMs to execute.
2N: Two clock cycles for the DRAM commands arrive at the DIMMs to execute.
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