Intel S5520SC Dokumentacja Pobierz pdf (Strona 4)

Table of Contents Intel® Workstation Board S5520SC TPS

Revision 1.7

Intel order number: E39530-010

Table of Contents

1. Introduction .......................................................................................................................... 1

1.1 Chapter Outline ........................................................................................................ 1

1.2 Workstation Board Use Disclaimer .......................................................................... 1

2. Overview ............................................................................................................................... 2

2.1 Intel

Workstation Board S5520SC Feature Set ...................................................... 2

2.2 Workstation Board Layout ....................................................................................... 5

2.2.1 Workstation Board Connector and Component Layout ........................................... 5

2.2.2 Workstation Board Mechanical Drawings ................................................................ 8

2.2.3 Workstation Board Rear I/O Layout ....................................................................... 15

3. Functional Architecture ..................................................................................................... 16

3.1 Intel

5520 I/O Hub (IOH) ...................................................................................... 17

3.1.1 Intel

QuickPath Interconnect ................................................................................ 17

3.1.2 PCI Express* Ports ................................................................................................ 17

3.1.3 Enterprise South Bridge Interface (ESI) ................................................................ 18

3.1.4 Manageability Engine (ME) .................................................................................... 18

3.1.5 Controller Link (CL) ................................................................................................ 18

3.2 Processor Support ................................................................................................. 18

3.2.1 Processor Population Rules .................................................................................. 18

3.2.2 Mixed Processor Configurations. ........................................................................... 19

3.2.3 Intel

Hyper-Threading Technology (Intel

HT) ..................................................... 20

3.2.4 Enhanced Intel SpeedStep

Technology (EIST) ................................................... 20

3.2.5 Intel

Turbo Boost Technology .............................................................................. 21

3.2.6 Execute Disable Bit Feature .................................................................................. 21

3.2.7 Core Multi-Processing ........................................................................................... 21

3.2.8 Direct Cache Access (DCA) .................................................................................. 21

3.2.9 Unified Retention System Support ......................................................................... 21

3.3 Memory Subsystem ............................................................................................... 22

3.3.1 Memory Subsystem Nomenclature ........................................................................ 22

3.3.2 Supported Memory ................................................................................................ 24

3.3.3 Processor Cores, QPI Links and DDR3 Channels Frequency Configuration ........ 24

3.3.4 Publishing System Memory ................................................................................... 28

3.3.5 Memory Interleaving .............................................................................................. 28

1 2 3 4 5 6 7 8 9 ... 191 192

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