Intel CHIPSET 820E Instrukcja Użytkownika Pobierz pdf (Strona 39)

Intel

820E Chipset

Design Guide 39

Figure 18. Direct RDRAM* Termination Example

2.7.2.3. Direct RDRAM* Ground Plane Reference

All RSL signals must be referenced to GND to provide the optimal current return path. The Direct

RDRAM ground plane reference must be continuous to the V

TERM

capacitors. The ground reference

island under the RSL signals must be continuous from the last RIMM to the back of the termination

capacitors. Choose a reference island shape that does not compromise power delivery to the components.

The return current will flow through the V

TERM

capacitors into the ground island and under the RSL

traces. Any split in the ground island will provide a suboptimal return path. In a four-layer board, this

will require the V

TERM

island to be on an outer layer. The V

TERM

island should always be placed on the

top layer.

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Intel CHIPSET 820E Instrukcja Użytkownika Strona 39