Intel SE7520JR2 Instrukcja Użytkownika

Intel® Server Board SE7520JR2 Technical Product Specification Revision 1.0October 2004Enterprise Platforms and Services Marketing

Table of Contents Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 x 6.4.2 Diagnostic LEDs ...

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 100 Feature Options Help Text Description Late POST Timeout Disabled 5 minutes

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 101 4.4.2.5.2 Serial Console Features Sub-menu Selections Table 40: BIOS Setup

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 102 Feature Options Help Text Description BIOS Event Logging Disabled Enabled

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 103The BIOS relies on specialized hardware and additional flash space to accompl

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 104 4.5.1.4 BIOS Recovery The BIOS has a ROM image size of 2 MB. A standard 1.44M

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 105 4.6 OEM Binary System customers can supply 16 KB of code and data for use d

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 106 4.7.1 Operating Model The following table summarizes the operation of securit

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 107Administrator/User Passwords and F2 Setup Usage Model Notes: • Visible=opti

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 108 Set User Password (visible) User Access Level [Full] (visible) Clear User

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 109PC200x specifications are intended for systems that are designed to work with

Intel® Server Board SE7520JR2 Table of Contents Revision 1.0 C78844-002 xi8. Design and Environmental Specifications...

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 110 The BIOS supports a control panel sleep button. The sleep button may not be

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 1114.9.2.6 Sleep to On (ACPI) If an operating system is loaded, the sleep butto

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 112 4.10 PXE BIOS Support The BIOS will support PXE-compliant implementations t

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 113BIOS Console Redirection is intended to accomplish the implementation

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 114 Element On-Board Platform Instrumentation Intel® Management Module -

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 1155.1 Platform Management Architecture Overview Figure 19. On-Board

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 116 5.1.1 5V Standby The power supply must provide a 5V Standby power so

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 117 5.1.3 IPMI ‘Sensor Model’ An IPMI-compatible ‘Sensor Model’ is used

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 118 5.1.4 Private Management Busses A ‘Private Management Bus’ is a sin

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 119These interfaces remain active on standby power, providing a mechanis

Table of Contents Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 xii Appendix A: Integration and Usage Tips...

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 120 • Platform Event Filtering (PEF) • Keyboard Controller Style (KCS)

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 121 5.2 On-Board Platform Management Features and Functionality The Nat

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 122 5.2.1 Server Management I2C Buses The table below describes the ser

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 123 Figure 21. External Interfaces to mBMC 5.3 mBMC Hardware Archi

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 124 Figure 22. mBMC Block Diagram 5.3.1 Power Supply Interface Signals T

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 125The following figure shows the power supply control signals and their

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 126 5.3.2 Power Control Sources The sources listed in the following tabl

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 1275.3.5.2 Reset Control Sources The following table shows the reset so

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 128 • Combined power and reset button assertion If DC power is off, an a

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 1295.3.5.4.2 Fault / Status LED The following table shows mapping of se

Intel® Server Board SE7520JR2 List of Figures Revision 1.0 C78844-002 xiiiList of Figures Figure 1. SE7520JR2 Board Layout ...

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 130 5.3.5.5.1 Chassis Intrusion Some platforms support chassis intrusion

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 131time, the LED will turn off. If the LED is on, a button press or IPMI

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 132 5.3.10.1 SEL Erasure It can take up to one minute to clear a System

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 1335.3.12 Field Replaceable Unit (FRU) Inventory Devices An enterprise-

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 134 5.3.16 mBMC Self Test The mBMC performs various tests as part of its

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 135• SMBus data signal (SDAH) • Optional SMBus alert signal (SMBAH). T

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 136 LAN Channel Capability Options Privilege Levels User, Operator, Adm

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 137down, power cycle, and/or reset actions, the actions are performed ac

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 138 mBMC sensors 01h – 08h are internal sensors to the mBMC and are used

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 139 Sensor Name Sensor # Sensor Type Event / Reading Type Event Offset T

List of Tables Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 xiv List of Tables Table 1: Baseboard Layout Reference ...

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 140 Sensor Name Sensor # Sensor Type Event / Reading Type Event Offset Tr

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 141

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 142 5.3.20 IMM BMC Sensor Support The following tables are for the built

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 143Sensor Name Sensor Number Sensor Type Event / Reading Type Event Offs

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 144 Sensor Name Sensor Number Sensor Type Event / Reading Type Event Offs

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 145Sensor Name Sensor Number Sensor Type Event / Reading Type Event Offs

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 146 Sensor Name Sensor Number Sensor Type Event / Reading Type Event Offs

Intel® Server Board SE7520JR2 Platform Management Revision 1.0 C78844-002 147Sensor Name Sensor Number Sensor Type Event / Reading Type Event Offs

Platform Management Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 148 Sensor Name Sensor Number Sensor Type Event / Reading Type Event Offs

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 1496. Error Reporting and Handling This section defines how er

Intel® Server Board SE7520JR2 List of Tables Revision 1.0 C78844-002 xvTable 33: BIOS Setup, Boot Device Priority Sub-menu Selections ...

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 150 system reset (ASR). The Sahalee BMC retains status bits that

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 151If the BIOS is going to boot to a known PXE-compliant device

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 152 does not alter the BSP and attempts to boot from the origina

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 153The following table shows memory error handling with both a

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 154 In non-RAS mode, BIOS will assert a Non-Maskable-Interrupt (

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 1556.3 Error Logging This section defines how errors are handle

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 156 6.3.4 Memory Bus Error The hardware is programmed to genera

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 157Gate20 Error The BIOS is unable to properly control the mo

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 158 Message Displayed Description detect and configure IDE/AT

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 159Message Displayed Description configure IDE/ATAPI devices

List of Tables Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 xvi Table 68: Error Codes and Messages ...

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 160 Message Displayed Description when it detects an imminent

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 161Message Displayed Description of channel 2 of the 8254 ti

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 162 Message Displayed Description bit data structure while the

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 163Error Code Error Message Response 0012 CMOS time not set

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 164 Error Code Error Message Response 8130 Processor 01 disab

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 165Error code Error messages 196 Processor cache mismatch det

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 166 Table 71: Troubleshooting BIOS Beep Codes Number of Beeps

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 167 Table 73: BMC Beep Code Code Reason for Beep 1 Front pan

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 168 Result Amber Green Red Off MSB LSB Figure 24. Loc

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 169Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint M

Intel® Server Board SE7520JR2 List of Tables Revision 1.0 C78844-002 xviiTable 103: External USB Connector Pin-out ...

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 170 Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint M

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 171Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint M

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 172 Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint M

Intel® Server Board SE7520JR2 Error Reporting and Handling Revision 1.0 C78844-002 173 6.5.7 ACPI Runtime Checkpoints ACPI checkpoints are displa

Error Reporting and Handling Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 174 Tpoint Description 0E5h MEM_ERR_SIZE_MISMATCH 0E6h MEM_ERR_

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 175 7. Connectors and Jumper Blocks 7.1 Power Connectors The m

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 176 Table 83: Power Supply Signal Connector (J1G1) Pin Signal

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 177Pin-Side B PCI Spec Signal Description Pin-Side APCI Spec S

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 178 Pin-Side B PCI Spec Signal Description Pin-Side APCI Spec S

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 179Pin-Side B PCI Spec Signal Description Pin-Side APCI Spec S

List of Tables Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 xviii < This page intentionally left blank. >

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 180 Table 86: Full-height Riser Slot Pinout Pin-Side B PCI Spec

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 181Pin-Side B PCI Spec Signal Description Pin-Side A PCI Spec

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 182 Pin-Side B PCI Spec Signal Description Pin-Side A PCI Spec

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 183Pin-Side B PCI Spec Signal Description Pin-Side A PCI Spec

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 184 Pin-Side B PCI Spec Signal Description Pin-Side A PCI Spec

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 185FMC Signal Name FMC Pin Description FML_SINTEX 27 Fast Ma

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 186 FMC Signal Name FMC Pin Description LAN_I2C_3VSB_SCL 58

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 187FMC Signal Name FMC Pin Description FMM_RI_BUF_N 97 Ring

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 188 Table 89: IPMB Connector Pin-out (J3F1) Pin Signal Name De

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 1897.3.4 OEM RMC Connector (J3B2) A white eight pin connector

Intel® Server Board SE7520JR2 Introduction Revision 1.0 C78844-002 191. Introduction This Technical Product Specification (TPS) provides detail to

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 190 Pin Signal Name Pin Signal Name A20 GND B20 FP_PWR_LED_L

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 191Pin# Signal Name Pin # Signal Name 19 LAN_ACT_B_L 20 F

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 192 Figure 25. 34-Pin SSI Compliant Control Panel Header 7.5

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 193Pin Signal Name 12 DDCDAT 13 HSYNC (horizontal sync) 14 V

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 194 Pin# Signal Name Signal Name Pin# 2 +DB(13) -DB(13) 36

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 195Pin Signal Name Pin Signal Name 1 RST_IDE_P_L 2 GND 3 ID

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 196 Table 99: Legacy 34-pin Floppy Drive Connector Pin-out (J3K2

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 1973 RXD (receive data) 4 RTS (request to send) 5 TXD (Trans

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 198 4 GND One internal 1x10 connector on the baseboard (J1F1) p

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 199There are two SSI compliant processor fan headers, CPU1 (J7F

Revision History Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 ii Revision History Date Revision Number Modifications December 2003 0.5

Introduction Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 20 1.2 Server Board Use Disclaimer Intel Corporation server boards contain a nu

Connectors and Jumper Blocks Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 200 24 BB_FAN_LED6_R IN The 1x3 fan header (J3K3) is used

Intel® Server Board SE7520JR2 Connectors and Jumper Blocks Revision 1.0 C78844-002 2017.8 Jumper Blocks The baseboard has several jumper blocks us

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 202 8. Design and Environmental Specifications 8.1

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 203Note: The following diagram shows the power harne

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 204 P1 Main Power Connector • Connector housing: 24-

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 205 P3 Power Signal Connector • Connector housing:

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 206 enclosure). This grounding must be designed to en

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 207 8.2.5 Voltage Regulation The power supply output

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 208 8.2.7 Capacitive Loading The power supply shall

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 209 8.2.11 Soft Starting The power supply shall cont

Intel® Server Board SE7520JR2 Server Board Overview Revision 1.0 C78844-002 21 2. Server Board Overview The Intel® Server Board SE7520JR2 is a mo

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 210 Figure 28. Output Voltage Timing Table 123: Tur

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 211 Figure 29. Turn On/Off Timing (Power Supply Sign

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 212 8.3 Product Regulatory Compliance 8.3.1 Produc

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 213 8.3.3 Certifications / Registrations / Declarat

Design and Environmental Specifications Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 214 8.4 Electromagnetic Compatibility Notices 8.4.1

Intel® Server Board SE7520JR2 Design and Environmental Specifications Revision 1.0 C78844-002 215This digital apparatus does not exceed the Class

Miscellaneous Board Information Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 216 9. Miscellaneous Board Information 9.1 Updating the Sy

Intel® Server Board SE7520JR2 Miscellaneous Board Information Revision 1.0 C78844-002 217• Replacing a bad baseboard • Adding/Removing a Redunda

Miscellaneous Board Information Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 218 Clear state and power the system up. This feature can be

Intel® Server Board SE7520JR2 Miscellaneous Board Information Revision 1.0 C78844-002 219• Recovery from multiple floppy disks. o Prepare 2 blan

Server Board Overview Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 22 o RJ45 Serial B Port o Two RJ45 NIC connectors o 15-pin video con

Intel® Server Board SE7520JR2 Appendix A: Integration and Usage Tips Revision 1.0 C78844-002 221Appendix A: Integration and Usage Tips The followi

Glossary Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 222 Glossary This appendix contains important terms used in the preceding chapters.

Intel® Server Board SE7520JR2 Glossary Revision 1.0 C78844-002 223Term Definition IFB I/O and firmware bridge IMM Intel Management Module INTR

Glossary Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 224 Term Definition SEEPROM Serial electrically erasable programmable read-only me

Intel® Server Board SE7520JR2 Reference Documents Revision 1.0 C78844-002 225Reference Documents Refer to the following documents for additional i

Intel® Server Board SE7520JR2 Server Board Overview Revision 1.0 C78844-002 23 Figure 1. SE7520JR2 Board Layout 3 1817 141311 15 109 8 765419 252

Server Board Overview Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 24 Table 1: Baseboard Layout Reference Ref # Description Ref # Desc

Intel® Server Board SE7520JR2 Server Board Overview Revision 1.0 C78844-002 25The following mechanical drawing shows the physical dimensions of th

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 26 3. Functional Architecture This chapter provides a high-level des

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 273.1 Processor Sub-system The support circuitry for the processor s

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 28 3.1.5 Common Enabling Kit (CEK) Design Support The baseboard has

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 29Processor Family FSB Frequency Frequency Support Intel® Xeon™

Intel® Server Board SE7520JR2 Disclaimers Revision 1.0 C78844-002 iii Disclaimers Information in this document is provided in connection with In

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 30 High and Low Ratio is determined and programmed to all processors.

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 31BSP and starts executing from the reset vector (F000:FFF0h). A pro

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 32 • Memory Controller Hub (MCH) • I/O Controller Hub (ICH5-R) • P

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 33GB/s. One x8 interface is used as the interconnect between the MCH

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 34 3.2.2.3 I/OxAPIC Controller The PXH contains two I/OxAPIC controll

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 35IDE channels of the ICH5R. One channel is accessed through the 40

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 36 3.2.3.6 Advanced Programmable Interrupt Controller (APIC) In addi

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 37The ICH5-R supports slave functionality, including the Host Notify

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 38 X8, double row 256MB 512MB 1GB 2GB X4, single row 256MB 512M

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 39Using the following algorithm, BIOS configures the memory controll

Table of Contents Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 iv Table of Contents 1. Introduction ...

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 40 E D/R D/R E E D/R D/R S/R S/R E D/R S/R Table 5: Supported DDR2-4

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 41status of the extended memory test is displayed on the console. T

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 42 Uncorrectable memory errors are critical errors that may cause the

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 43engine logs the failure. Both types of errors may be reported via

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 44 3.3.6.5 DIMM Sparing Function To provide a more fault tolerant sy

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 453.3.6.6 Memory Mirroring The memory mirroring feature is fundament

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 46 Figure 7. Six DIMM Memory Mirror Configuration (DDR2 Only) These

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 47the primary and mirror DIMMs, thereby distributing the thermal ima

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 48 Table 7: PCI Bus Segment Characteristics PCI Bus Segment Voltage

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 49supports a maximum of 66MHz, the entire bus will throttle down to

Intel® Server Board SE7520JR2 Table of Contents Revision 1.0 C78844-002 v3.2.2 PCI-X Hub (PXH)...

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 50 hierarchical PCI bus under the current bridge. The PCI bus number

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 51 Table 8: PCI Configuration IDs and Device Numbers PCI Device IDS

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 52 3.4.1.8 Resource Assignment The resource manager assigns the PIC-

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 53Both PCI and IRQ types of interrupts are handled by the ICH5-R. Th

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 54 3.4.3.3 Legacy Interrupt Sources The table below recommends the

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 55 3.4.3.5 IRQ Scan for PCIIRQ The IRQ / data frame structure inclu

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 56 Figure 9. Interrupt Routing Diagram PIRQBPIRQPIRQASuper I/O Timer

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 57 Figure 10. PCI Interrupt Mapping Diagram Figure 11. PCI Interru

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 58 3.4.4 SCSI Support The SCSI sub-system consists of the LSI 53C1030

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 59• Quick arbitrate and select (QAS) • Skew compensation • Inter-

Table of Contents Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 vi 3.4.3 Interrupt Routing ...

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 60 • Reduces Interrupt Service Routine (ISR) overhead with interrupt

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 61The BIOS initializes and supports ATAPI devices such as LS-120/240

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 62 3.4.6.1 SATA RAID The Intel® RAID Technology solution, available w

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 63Table 11: Video Modes 2D Video Mode Support 2D Mode Refresh Rate

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 64 CKE O Clock Enable for Memory CS#[1..0] O Chip Select for Memor

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 653.4.8.1 NIC Connector and Status LEDs The 82546GB drives the two

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 66 Pin Name IO/GPIO SE7520JR2 Use 2 GPIOE11/XA10 I/O,I(E)1 XBUS_A

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 673.4.10.2 Serial Ports The baseboard provides two serial ports: an

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 68 BMCBusExchangeSIO2 to 1MuxLevelshifterLevelShifterHeaderRearRJ45Se

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 69 Note: The appropriate RJ45-to-DB9 adapter should match the config

Intel® Server Board SE7520JR2 Table of Contents Revision 1.0 C78844-002 vii4.3 BIOS Power On Self Test (POST)...

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 70 3.5 Configuration and Initialization This section describes the i

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 71 3.5.1.1 DOS Compatibility Region The first region of memory belo

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 72 3.5.1.1.1 DOS Area The DOS region is 512 KB in the address range

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 73 3.5.1.2 Extended Memory Extended memory is defined as all address

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 74 3.5.1.2.1 Main Memory All installed memory greater than 1MB is ma

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 753.5.1.4 System Management Mode Handling The chipset supports Syst

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 76 3.5.2 I/O Map The baseboard I/O addresses are mapped to the proce

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 77Address (es) Resource Notes 0071h RTC Data 0073h RTC Data Al

Functional Architecture Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 78 Address (es) Resource Notes 03F8h – 03FFh Serial Port A (primar

Intel® Server Board SE7520JR2 Functional Architecture Revision 1.0 C78844-002 79 3.5.3.1 CONFIG_ADDRESS Register CONFIG_ADDRESS is 32 bits wide an

Table of Contents Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 viii 5.1 Platform Management Architecture Overview ...

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 80 4. System BIOS The BIOS is implemented as firmware that resides in the Flash

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 81As such, the BIOS ID for this platform takes the following form: • SE7520JR2

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 82 Figure 18. POST Console Interface 4.3.1.1 System Activity Window The top ro

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 83The Static Information Display area presents the following information: • Cop

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 84 Table 17: Sample BIOS Popup Menu Please select boot device: 1st Floppy Hard D

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 85Key Option Description ↔ Select Menu The left and right arrow keys are used

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 86 Feature Options Help Text Description System Overview AMI BIOS Version N/A

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 874.4.2.2.1 Processor Configuration Sub-menu Table 21: BIOS Setup, Processor C

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 88 4.4.2.2.2 IDE Configuration Sub-menu Table 22: BIOS Setup IDE Configuration

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 89Feature Options Help Text Description Third IDE Master N/A While entering

Intel® Server Board SE7520JR2 Table of Contents Revision 1.0 C78844-002 ix5.3.17.2 User Model...

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 90 Table 24: BIOS Setup, IDE Device Configuration Sub-menu Selections Feature O

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 91 4.4.2.2.3 Floppy Configuration Sub-menu Table 25: BIOS Setup, Floppy Config

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 92 4.4.2.2.5 USB Configuration Sub-menu Table 27: BIOS Setup, USB Configuration

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 93Feature Options Help Text Description Device #n N/A N/A Only displayed i

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 94 Feature Options Help Text Description Slot 1 Option ROM Disabled Enabled P

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 95Feature Options Help Text Description DIMM 3A Installed Not Installed Disa

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 96 4.4.2.3.1 Boot Settings Configuration Sub-menu Selections Table 32: BIOS Set

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 974.4.2.3.2 Boot Device Priority Sub-menu Selections Table 33: BIOS Setup, Boo

System BIOS Intel® Server Board SE7520JR2 Revision 1.0 C78844-002 98 nth Drive Varies Specifies the boot sequence from the available devices. Var

Intel® Server Board SE7520JR2 System BIOS Revision 1.0 C78844-002 99Feature Options Help Text Description Secure Mode Boot Disabled Enabled Whe