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Intel

Itanium

Processor 9300 Series and 9500 Series Datasheet 23

Electrical Specifications

2 Electrical Specifications

This chapter describes the electrical specifications of the Intel

Itanium

Processor

9300 Series and 9500 Series processors.

2.1 Intel

QuickPath Interconnect and Intel

Scalable Memory Interconnect

Differential Signaling

The links for Intel

QuickPath Interconnect (Intel

QPI) and Intel

Scalable Memory

Interconnect (Intel

SMI) signals use differential signaling. The Intel

SMI bus pins are

referred to as FB-DIMM pins on the package. The termination voltage level for the

processor for uni-directional serial differential links, each link consisting of a pair of

opposite-polarity (D+, D-) signals, is V

Termination resistors are provided on the processor silicon and are terminated to V

SS,

thus eliminating the need to terminate the links on the system board for the Intel

QuickPath Interconnect and FB-DIMM signals.

When designing a system, Intel strongly recommends that design teams perform

analog simulations of the Intel

QuickPath Interconnect and FB-DIMM pins. Please

refer to the latest available revision of the Intel

Itanium

Processor 9300 Series and

Intel

Itanium

Processor 9500 Series Platform Design Guide.

Figure 2-1 illustrates the active on-die termination (ODT) of these differential signals.

All the differential signals listed in Table 2-1 have ODT resistors. Also included in the

table are the debug signals.

Figure 2-1. Active ODT for a Differential Link Example

Signal

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 171 172

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