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Document Number: 319535-003US
Intel
®
Atom™ Processor Z5xx
Series
Datasheet
For the Intel
®
Atom™ Processor Z560
, Z550
, Z540
, Z530
,
Z520
, Z515
, Z510
, and Z500
on 45 nm Process Technology
June 2010
Przeglądanie stron 0
1 2 3 4 5 6 ... 72 73

Podsumowanie treści

Strona 1 - Series

Document Number: 319535-003US Intel® Atom™ Processor Z5xx∆ Series Datasheet — For the Intel® Atom™ Processor Z560∆, Z550∆, Z540∆, Z530∆, Z5

Strona 2 - 2 Datasheet

Introduction 10 Datasheet Term Definition VCC,BOOT Default VCC Voltage for Initial Power Up VCCP AGTL+ Termination Voltage VCCPC6 AGTL+ Termin

Strona 3 - Contents

Introduction Datasheet 11 1.4 References Material and concepts available in the following documents may be beneficial when reading this docum

Strona 4 - Figures

Introduction 12 Datasheet This page intentionally left blank.

Strona 5 - Revision History

Low Power Features Datasheet 13 2 Low Power Features 2.1 Clock Control and Low-Power States The processor supports low power states at the t

Strona 6 - 6 Datasheet

Low Power Features 14 Datasheet Figure 1. Thread Low-Power States C2†C0StopGrantCore statebreakP_LVL2 orMWAIT(C2)C1/MWAITCore statebreakMWAIT(C

Strona 7 - 1 Introduction

Low Power Features Datasheet 15 Table 2. Coordination of Thread Low-Power States at the Package/Core Level Thread 0 Thread 1 TC0 TC11 TC2 T

Strona 8 - 8 Datasheet

Low Power Features 16 Datasheet 2.1.1.1.2 C1/MWAIT Powerdown State C1/MWAIT is a low-power state entered when one thread executes the MWAIT(C1

Strona 9 - 1.3 Terminology

Low Power Features Datasheet 17 2.1.1.2.2 Stop-Grant Snoop State The processor responds to snoop or interrupt transactions on the FSB while i

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Low Power Features 18 Datasheet 2.1.1.3.2 Deep Sleep State The Deep Sleep state is entered through assertion of the DPSLP# pin while in the Sl

Strona 11 - 1.4 References

Low Power Features Datasheet 19 2.1.1.3.4 Intel® Atom™ Processor Z5xx Series C5 As mentioned previously in this document, each C-state has la

Strona 12 - 12 Datasheet

2 Datasheet INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPE

Strona 13 - 2 Low Power Features

Low Power Features 20 Datasheet 2.1.1.4.1 Intel® Deep Power Down Technology State (Package C6 State) When both threads have entered the C6 st

Strona 14 - 14 Datasheet

Low Power Features Datasheet 21 Figure 5 shows the relative exit latencies of the package sleep states discussed above. Note: Figure 5 uses

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Low Power Features 22 Datasheet 2.2 Dynamic Cache Sizing Dynamic Cache Sizing allows the processor to flush and disable a programmable number

Strona 16 - 2.1.1.2 C2 State

Low Power Features Datasheet 23 2.3 Enhanced Intel SpeedStep® Technology The processor features Enhanced Intel SpeedStep® Technology. The fol

Strona 17 - 2.1.1.3 C4 State

Low Power Features 24 Datasheet 2.4 Enhanced Low-Power States Enhanced low-power states (C1E, C2E, and C4E) optimize for power by forcibly red

Strona 18 - 2.1.1.3.2 Deep Sleep State

Low Power Features Datasheet 25 2.5 FSB Low Power Enhancements The processor incorporates FSB low power enhancements: • BPRI# control for ad

Strona 19 - 2.1.1.4 C6 State

Low Power Features 26 Datasheet 2.6 Intel® Burst Performance Technology (Intel® BPT) The processor supports ACPI Performance States (P-States

Strona 20 - Thread 0

Electrical Specifications Datasheet 27 3 Electrical Specifications This chapter contains signal group descriptions, absolute maximum ratings,

Strona 21 - Datasheet 21

Electrical Specifications 28 Datasheet 3.3 Decoupling Guidelines Due to its large number of transistors and high internal clock speeds, the pr

Strona 22 - 2.2 Dynamic Cache Sizing

Electrical Specifications Datasheet 29 Table 3. Voltage Identification Definition VID6 VID5 VID4 VID3 VID2 VID1 VID0 VCC (V) 0 0 1 1

Strona 23 - Datasheet 23

Datasheet 3 Contents 1 Introduction ... 7

Strona 24 - 24 Datasheet

Electrical Specifications 30 Datasheet VID6 VID5 VID4 VID3 VID2 VID1 VID0 VCC (V) 0 1 1 1 1 1 0 0.7250 0 1 1 1 1 1 1 0.712

Strona 25 - 2.5.1 CMOS Front Side Bus

Electrical Specifications Datasheet 31 3.6 Catastrophic Thermal Protection The processor supports the THERMTRIP# signal for catastrophic ther

Strona 26 - (Intel® BPT)

Electrical Specifications 32 Datasheet Implementation of a source synchronous data bus determines the need to specify two sets of timing parame

Strona 27 - 3 Electrical Specifications

Electrical Specifications Datasheet 33 3.10 CMOS Asynchronous Signals CMOS input signals are shown in Table 5. Legacy output FERR#, IERR#, an

Strona 28 - 3.3 Decoupling Guidelines

Electrical Specifications 34 Datasheet Table 6. Processor Absolute Maximum Ratings Symbol Parameter Min. Max. Unit Notes1 TSTORAGE Proce

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Electrical Specifications Datasheet 35 Table 7. Voltage and Current Specifications for the Intel® Atom™ Processor Z560, Z550, Z540, Z530, Z520

Strona 30

Electrical Specifications 36 Datasheet Symbol Parameter Min. Typ. Max. Unit Notes11 ICCA ICC for VCCA Supply — — 130 mA ICCP+ ICCP

Strona 31 - 3.9 FSB Signal Groups

Electrical Specifications Datasheet 37 Table 8. Voltage and Current Specifications for the Intel® Atom™ Processor Z500 Symbol Parameter Min.

Strona 32

Electrical Specifications 38 Datasheet 6. VCC,BOOT tolerance is shown in Figure 6 and Figure 7. 7. Based on simulations and averaged over the

Strona 33 - 3.11 Maximum Ratings

Electrical Specifications Datasheet 39 Symbol Parameter Min. Typ. Max. Unit Notes11 dICC/dt V Power Supply Current Slew Rate @ Processor

Strona 34 - CC,BOOT

4 Datasheet 5.1.4 Out of Specification Detection ... 72 5.1.5 PROCHOT# Signal Pin ...

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Electrical Specifications 40 Datasheet Figure 6. Active Vcc and Icc Loadline 10 mV = RippleSlope = -5.7 mV/A at package VCC_SENSE, VSS_SENSE p

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Electrical Specifications Datasheet 41 Figure 7. Deeper Sleep VCC and ICC Loadline 10 mV = Ripple forPSI# AssertedSlope = -5.7 mV/A at packag

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Electrical Specifications 42 Datasheet Table 10. FSB Differential BCLK Specifications Symbol Parameter Min. Typ. Max. Unit Figure Notes1

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Electrical Specifications Datasheet 43 Table 11. AGTL+/CMOS Signal Group DC Specifications Symbol Parameter Min. Typ. Max. Unit Notes1 V

Strona 39

Electrical Specifications 44 Datasheet Table 12. Legacy CMOS Signal Group DC Specifications Symbol Parameter Min. Typ. Max. Unit Notes1 V

Strona 40 - Loadline

Electrical Specifications Datasheet 45 3.13 AGTL+ FSB Specifications Termination resistors are not required for most AGTL+ signals, as these

Strona 41 - Figure 7. Deeper Sleep V

Electrical Specifications 46 Datasheet This page intentionally left blank.

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Package Mechanical Specifications and Pin Information Datasheet 47 4 Package Mechanical Specifications and Pin Information This chapter descr

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Package Mechanical Specifications and Pin Information 48 Datasheet Figure 8. Package Mechanical Drawing

Strona 44

Package Mechanical Specifications and Pin Information Datasheet 49 4.2 Processor Pinout Assignment Figure 9 and Figure 10 are graphic represe

Strona 45 - Datasheet 45

Datasheet 5 Revision History Document Number Revision Number Description Revision Date 319535 001 • Initial release April 2008 319535

Strona 46 - 46 Datasheet

Package Mechanical Specifications and Pin Information 50 Datasheet Figure 10. Pinout Diagram (Top View, Right Side) R P N M L K J H G F E D C

Strona 47 - Information

Package Mechanical Specifications and Pin Information Datasheet 51 Table 14. Pinout Arranged by Signal Name Signal Name Ball # A[3]# E22 A[4

Strona 48 - 48 Datasheet

Package Mechanical Specifications and Pin Information 52 Datasheet Signal Name Ball # D[36]# AH9 D[37]# AE10 D[38]# AJ16 D[39]# AF13 D[40]

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Package Mechanical Specifications and Pin Information Datasheet 53 Signal Name Ball # TEST4 U30 THERMTRIP# T1 THRMDA T5 THRMDC U4 TMS P1

Strona 50

Package Mechanical Specifications and Pin Information 54 Datasheet Signal Name Ball # VCCPC6 H9 VCCPC6 J8 VCCPC6 M27 VCC_SENSE W2 VID[0]

Strona 51

Package Mechanical Specifications and Pin Information Datasheet 55 Signal Name Ball # VSS K9 VSS K11 VSS K13 VSS K15 VSS K17 VSS K19 VS

Strona 52

56 Datasheet 4.3 Signal Description Table 15. Signal Description Signal Name Type Description A[31:3]# I/O A[31:3]# (Address) defines a 232-b

Strona 53

Package Mechanical Specifications and Pin Information Datasheet 57 Signal Name Type Description BPM[0]# O BPM[3:0]# (Breakpoint Monitor) ar

Strona 54

58 Datasheet Signal Name Type Description DBSY# I/O DBSY# (Data Bus Busy) is asserted by the agent responsible for driving data on the FSB to

Strona 55

Package Mechanical Specifications and Pin Information Datasheet 59 Signal Name Type Description FERR#/PBE# O FERR# (Floating-point Error) P

Strona 56 - 4.3 Signal Description

6 Datasheet This page intentionally left blank.

Strona 57

60 Datasheet Signal Name Type Description INIT# I INIT# (Initialization), when asserted, resets integer registers inside the processor without

Strona 58

Package Mechanical Specifications and Pin Information Datasheet 61 Signal Name Type Description PWRGOOD I PWRGOOD (Power Good) is a process

Strona 59

62 Datasheet Signal Name Type Description STPCLK# I STPCLK# (Stop Clock), when asserted, causes the processor to enter a low power Stop-Grant

Strona 60

Package Mechanical Specifications and Pin Information Datasheet 63 Signal Name Type Description VID[6:0] O VID[6:0] (Voltage ID) pins are u

Strona 61 - must be tied directly to V

64 Datasheet This page intentionally left blank.

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Thermal Specifications and Design Considerations Datasheet 65 5 Thermal Specifications and Design Considerations The processor requires a the

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66 Datasheet Table 16. Power Specifications for Intel® Atom™ Processors Z560, Z550, Z540, Z530, Z520, and Z510 Symbol Processor Number Core Freq

Strona 64 - 64 Datasheet

Thermal Specifications and Design Considerations Datasheet 67 Table 17. Power Specifications for Intel® Atom™ Processors Z515 and Z500 Symbol

Strona 65 - Design Considerations

68 Datasheet 5.1 Thermal Specifications The processor incorporates three methods of monitoring die temperature—Digital Thermal Sensor, Intel The

Strona 66 - 5.1 for more details

Thermal Specifications and Design Considerations Datasheet 69 Table 18. Thermal Diode Interface Signal Name Pin/Ball Number Signal Descripti

Strona 67

Introduction Datasheet 7 1 Introduction The Intel® Atom™ processor Z5xx series is built on a new 45-nanometer Hi-k low power micro-architectu

Strona 68 - 5.1 Thermal Specifications

70 Datasheet 5.1.2 Intel® Thermal Monitor The Intel Thermal Monitor helps control the processor temperature by activating the TCC (Thermal Contr

Strona 69 - = Tmeasured * (1 – n

Thermal Specifications and Design Considerations Datasheet 71 over TM2 is enabled in MSRs using BIOS and TM2 is not sufficient to cool the pro

Strona 70 - 70 Datasheet

72 Datasheet 5.1.3 Digital Thermal Sensor The processor also contains an on die Digital Thermal Sensor (DTS) that is read using an MSR (no I/O i

Strona 71 - Datasheet 71

Thermal Specifications and Design Considerations Datasheet 73 The processor implements a bidirectional PROCHOT# capability to allow system des

Strona 72 - 5.1.5 PROCHOT# Signal Pin

Introduction 8 Datasheet • Execute Disable Bit support for enhanced security • Intel® Burst Performance Technology (Intel® BPT) (Intel Atom p

Strona 73 - Datasheet 73

Introduction Datasheet 9 1.3 Terminology Term Definition # A “#” symbol after a signal name refers to an active low signal, indicating a s

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