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PENTIUM® III XEON™ PROCESSOR AT 600 MHz to 1 GHz with 256KB L2 Cache

PROCESSOR FEATURES

Systems implementing analog sensing should read the PIROM first, then compare that value with the

measured VIN_SENSE rather than assuming any specific value. The value of AN_CORE_VSENSE is

implementation dependent and cannot be assumed to be any particular value. Systems may derive benefit by

monitoring its stability, but should not make assumptions about its value. In Table 26, text in bold represents

the new defined fields for the Pentium® III Xeon™ processor at 600 MHz+.

1 2 ... 38 39 40 41 42 43 44 45 46 47 48 ... 102 103

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Intel 80526KZ667256 Arkusz Danych Strona 43