Intel 815 Instrukcja Użytkownika Strona 135
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Clocking
R
Intel
®
815 Chipset Platform Design Guide 135
11.3 Clock Routing Guidelines
This section presents the generic clock routing guidelines for both 2-DIMM and 3-DIMM boards.
For 3-DIMM boards, additional analysis must be performed by the motherboard designer to ensure
that the clocks generated by the external PCI clock buffer meet the PCI specifications for clock
skew at the receiver, when compared with the PCI clock at the ICH.
Figure 70. Clock Routing Topologies
CK815
Section 1 Section 2
Layout 1
33
Ω
Connector
CK815
Section 1 Section 2
Layout 3
33
Ω
CK815
Section 1 Section 3
33
Ω
Section 0
Processor
GMCH
clk_routing_topo
CK815
Section 1 Section 2
Layout 4
33
Ω
CK815
Section 1 Section 2
Layout 2
33
Ω
Section 3
22 pF10 pF
CK815
Section 1 Section 2
Layout 5
33
Ω
Connector
22 pF
- 815 Chipset Platform 1
- Contents 3
- Figures 8
- Revision History 11
- 1 Introduction 13
- 1.1 Terminology 14
- Term Description 15
- 1.2 Reference Documents 16
- 1.3 System Overview 16
- 1.3.1 System Features 17
- 1.3.2 Component Features 18
- 1.3.2.2 Intel 20
- 1.3.2.3 Firmware Hub (FWH) 20
- 1.3.3 Platform Initiatives 21
- TCO Timer 22
- Processor Present Indicator 22
- Function Disable 22
- Intruder Detect 22
- Alert on LAN* 22
- 1.3.3.7 AC’97 23
- 2.1 Nominal Board Stackup 25
- Future 0.13 Micron 31
- Socket 370 31
- Processors 31
- Proc_Detect 32
- Selection Switch 33
- 4.2.4 VTT Processor Pin AG1 34
- SMAA[12] 35
- Proc_ID_Strap 35
- VTTPWRGD_Config 36
- 4.2.7 VCMOS Reference 37
- PWRGOOD to Processor 38
- PW RGOOD from ICH2 38
- API_CLK_SW 39
- 63.4 Ω 75 Ω 40
- 150 Ω 150 Ω 40
- ProcessorGMCH 40
- VDD on CK-815 41
- VTTPWRGD12 41
- ICH_PWROK_GATING 42
- PGA370 socket 46
- L(1): Z 46
- = 60 Ω ± 15% 46
- Ground Reference 47
- Reference Plane Splits 47
- Processor Connector Breakout 47
- Minimizing Cross-Talk 48
- 5.2.1.2 THRMDP and THRMDN 50
- Designs 51
- for future 0.13 micron 52
- • Reserved for Pentium III 55
- • 1.25V PLL reference 55
- • VCC2.5 for Pentium III 55
- Ω), 1% R2 (Ω) 57
- Ω), 1% CLKREF Voltage (V) 57
- 5.9.1 Topology 59
- 5.9.2 Filter Specification 59
- NOTES: 60
- 1. Diagram not to scale 60
- PLL_filter_1 62
- PLL_filter_2 62
- 5.12 Thermal Considerations 65
- 5.13 Debug Port Changes 67
- 6 System Memory Design 69
- Guidelines 69
- A B C D E F 71
- Signal Top 71
- Min. (16 Mbit) 8 MB 73
- Max. (64 Mbit) 256 MB 73
- Max. (128 Mbit) 512 MB 73
- A B C D E F G 74
- 6.5 Compensation 77
- 7 AGP/Display Cache Design 79
- 7.2 AGP 2.0 82
- AGP_2x-4x_routing 85
- 7.3.4 AGP Clock Routing 88
- AGP_decoupling_cap_placement 89
- AGP_Down_1x-2x 91
- 7.4.4 AGP Clock Routing 92
- AGP_VDDQ_gen_ex_circ 94
- 7.6.1 Compensation 97
- 7.6.2 AGP Pull-Ups 97
- 8.1 Analog RGB/CRT 101
- NOTE: Diodes D 102
- Board Cross Section 103
- Graphics Chip 105
- 8.2 Digital Video Out 106
- 9 Hub Interface 107
- 9.1.1 Data Signals 108
- 9.1.2 Strobe Signals 108
- 9.1.4 Compensation 109
- 10 I/O Subsystem 111
- IDE connector 112
- Black wires: ground 112
- Grey wires: signals 112
- IDE_cable_det_host 114
- IDE_resistor_schem_primar 116
- IDE_resistor_schem_secondar 117
- Detection 118
- 10.3 AC’97 119
- Controller) 123
- 10.6 SMBus 124
- 10.7 PCI 124
- 10.8 LPC/FWH 125
- 10.9 RTC 125
- 10.9.1 RTC Crystal 126
- 10.9.2 External Capacitors 126
- VCC3_3SBY 127
- RTC_RTCRESET_ext_circ 128
- 11 Clocking 131
- 11.2 3-DIMM Clocking 133
- PCI slots 134
- Processor 135
- 136 Intel 136
- Clocking 137
- 11.4 Clock Decoupling 137
- 138 Intel 138
- 11.6 Clock Skew Assumptions 138
- 11.7 Intel 139
- 140 Intel 140
- 12 Power Delivery 141
- 142 Intel 142
- Power Delivery 143
- 144 Intel 144
- 12.1 Thermal Design Power 144
- LEAKAGE 145
- 146 Intel 146
- 148 Intel 148
- 150 Intel 150
- 152 Intel 152
- 154 Intel 154
- 13 System Design Checklist 155
- 156 Intel 156
- /Connect to ICH 156
- System Design Checklist 157
- 158 Intel 158
- 13.3 GMCH Checklist 158
- 160 Intel 160
- 13.4 ICH Checklist 161
- 162 Intel 162
- 164 Intel 164
- 13.5 LPC Checklist 165
- 166 Intel 166
- 13.6 System Checklist 166
- 13.7 FWH Checklist 166
- 168 Intel 168
- 13.9 LAN Checklist 168
- 170 Intel 170
- Memory Vendors 171
- 172 Intel 172
- Board (CRB) 173
- COVER SHEET 174
- BLOCK DIAGRAM 175
- 370PGA SOCKET, PART 1 176
- 370PGA SOCKET, PART 2 177
- Clock Synthesizer 178
- 82815B GMCH, PART 1, 4, AND 5 179
- 82815B GMCH, PART 2 180
- 82815B GMCH, PART 3 181
- AGP CONNECTOR 182
- SYSTEM MEMORY 183
- ICH, PART 1 185
- INTEL 82801AA 185
- PART 1 185
- ICH, PART 2 186
- FIRMWARE HUB (FWH) SOCKET 187
- SUPER I/O 188
- PCI CONNECTOR 0 189
- (DEV Ah) 189
- PCI CONNECTOR 1 190
- (DEV Bh) 190
- IDE CONNECTORS 191
- TUSB2043 192
- PARALLEL PORT 193
- Serial Port and Header 194
- Keyboard/Mouse Port 195
- Floppy Disk Header 195
- Game Port 196
- Digital Video Out Connector 197
- (FOR DEBUG PURPOSES ONLY) 197
- VGA CONNECTOR 198
- Audio/Modem Riser 199
- AC'97 Audio Codec 200
- Audio Connectors 201
- Last Revision Date: 202
- Voltage Regulators 204
- AGP, VCMOS Voltage Regulator 205
- Processor Voltage Regulator 206
- SYSTEM, PART 1 207
- SN74LVC06A has 5V input 208
- Unused Gates 209
- 370-pin Socket Decoupling 210
- VRM DECOUPLING 211
- Hub Interface Connector 212
- THERMTRIP 213
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