Intel 41210 Instrukcja Użytkownika

Intel® 41210 Serial to Parallel PCI BridgeDesign GuideMay 2005Order Number: 278801-004

10 Intel® 41210 Serial to Parallel PCI Bridge Design GuideIntroduction• Tunable inbound read prefetch algorithm for PCI MRM/MRL commands• Local initia

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 11Introduction2.4.2 Microcontroller Connections to the 41210 BridgeThe following diagram shows

12 Intel® 41210 Serial to Parallel PCI Bridge Design GuideIntroduction2.5 JTAG• Compliant with IEEE Standard Test Access Port and Boundary Scan Archit

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 13Introduction2.7 Intel®41210 Serial to Parallel PCI Bridge ApplicationsThis section provides

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 15Package Information 33.1 Package SpecificationThe 41210 Bridge is in a 567-ball FCBGA packag

16 Intel® 41210 Serial to Parallel PCI Bridge Design GuidePackage InformationFigure 6. Bottom View - 41210 Bridge 567-Ball FCBGA Package DimensionsB2

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 17Package InformationFigure 7. Side View - 41210 Bridge 567-Ball FCBGA Package DimensionsB271

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 19Power Plane Layout 4This chapter provides details on the decoupling and voltage planes need

ii Intel® 41210 Serial to Parallel PCI Bridge Design GuideINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXP

20 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Power Plane LayoutFigure 9. Decoupling Placement for PCI/PCI-X 1.5V and 3.3V Voltage Plane

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 21Power Plane LayoutTable 2. 41210 Bridge Decoupling Guidelines4.2 Split Voltage PlanesThere

22 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Power Plane LayoutNote: Linear voltage regulators are recommended when using 1.5 Volt power

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 2341210 Bridge Reset and Power Timing Considerations 5This chapter describes the 41210 Bridge

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 25General Routing Guidelines 6This chapter provides some basic routing guidelines for layout

26 Intel® 41210 Serial to Parallel PCI Bridge Design Guide General Routing Guidelines• Avoid slots in the ground plane. Slots increases mutual inducta

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 27General Routing Guidelines6.4 Power Distribution and DecouplingHave ample decoupling to gro

28 Intel® 41210 Serial to Parallel PCI Bridge Design Guide General Routing GuidelinesNote: Using stripline transmission lines may give better results

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 29Board Layout Guidelines 7This chapter provides details on adapter card stackup suggestions.

Intel® 41210 Serial to Parallel PCI Bridge Design Guide iiiContentsContents1 About This Document ...

30 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Board Layout GuidelinesNOTE: Each interface will set the trace spacing based on its signal

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 31PCI-X Layout Guidelines 8This chapter describes several factors to be considered with a 412

32 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesNote: PCI Express Assert_INTx/Deassert_INTx messages are not inhibit

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 33PCI-X Layout Guidelines• Priority group for a master (i.e., whether a master is in low prio

34 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesTable 7. PCI/PCI-X Frequency/Mode StrapsNote: All signals sampled o

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 35PCI-X Layout GuidelinesB_CBE#[7:4], B_DEVSEL#, B_FRAME#, B_INTA#, B_INTB#, B_INTC#, B_INTD#

36 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout GuidelinesFigure 17. PCI Clock Distribution and Matching RequirementsB1499-04

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 37PCI-X Layout GuidelinesTable 8. PCI-X Clock Layout Requirements SummaryParameter Routing G

38 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout Guidelines8.5 PCI-X Topology Layout GuidelinesThe PCI-X Addendum to the PCI Lo

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 39PCI-X Layout Guidelines8.6.1 Embedded PCI-X 133 MHzThis section lists the routing recommend

iv Intel® 41210 Serial to Parallel PCI Bridge Design GuideContents8.6.1 Embedded PCI-X 133 MHz ...

40 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout Guidelines8.6.2 Embedded PCI-X 100 MHzThis section lists the embedded routing

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 41PCI-X Layout Guidelines8.6.3 PCI-X 66 MHz Embedded TopologyFigure 20 and Table 12 provide r

42 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI-X Layout Guidelines8.6.4 PCI 66 MHz Embedded TopologyFigure 21 and Table 13 provide rou

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 43PCI-X Layout Guidelines8.6.5 PCI 33 MHz Embedded Mode TopologyFigure 22 and Table 14 provid

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 45PCI Express Layout 9This section provides an overview of the PCI-Express stackup recommende

46 Intel® 41210 Serial to Parallel PCI Bridge Design Guide PCI Express Layout9.2 PCI-Express Layout GuidelinesThe layout guidelines for PCI-Express we

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 47PCI Express LayoutReceive Trace Length (Card edge finger to 41210 Bridge receiver pin1.0” m

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 49Circuit Implementations 10This chapter describes 41210 Bridge circuit implementations.10.1

Intel® 41210 Serial to Parallel PCI Bridge Design Guide vContents22 PCI 33 MHz Embedded Mode Routing Topology...

50 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Circuit Implementations10.1.1 PCI Analog Voltage FiltersThe following filter circuit is rec

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 51Circuit ImplementationsFigure 24. PCI Express Analog Voltage Filter CircuitNote: .• Place

52 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Circuit ImplementationsFigure 25. Bandgap Analog Voltage Filter CircuitNote: .• Place C as

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 53Circuit Implementations10.2 Intel® 41210 Serial to Parallel PCI Bridge Reference and Compen

54 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Circuit Implementations10.2.1 SM BusThe SMBus interface does not have configuration registe

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 5541210 Bridge Customer Reference Boards 11This chapter describes the 41210 Bridge Customer

56 Intel® 41210 Serial to Parallel PCI Bridge Design Guide 41210 Bridge Customer Reference Boards11.2 MaterialThe following materials are used with th

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 5741210 Bridge Customer Reference Boards11.4 Board OutlineFigure 27 provides the mechanical o

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 59Design Guide Checklist 12This checklist highlights design considerations that should be rev

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60 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Design Guide ChecklistTable 20. PCI/PCI-X Interface SignalsSignals Recommendations Reason/

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 61Design Guide ChecklistA_M66ENB_M66ENControls frequency of the PCI segment when running in c

62 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Design Guide ChecklistTable 21. Miscellaneous SignalsSignals Recommendations Reason/Impact

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 63Design Guide ChecklistTable 23. Power and Ground SignalsSignal Recommendations Reason/Impa

64 Intel® 41210 Serial to Parallel PCI Bridge Design Guide Design Guide ChecklistTable 24. JTAG SignalsSignal Recommendations Reason/ImpactTCK If not

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 7About This Document 1This document provides layout information and guidelines for designing p

8 Intel® 41210 Serial to Parallel PCI Bridge Design GuideAbout This DocumentPCBPrinted circuit board. Example manufacturing process consists of the fo

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 9Introduction 2The Intel®41210 Serial to Parallel PCI Bridge integrates two PCI Express-to-PC