Intel L5618 Arkusz Danych Strona 11

  • Pobierz
  • Dodaj do moich podręczników
  • Drukuj
  • Strona
    / 64
  • Spis treści
  • BOOKMARKI
  • Oceniono. / 5. Na podstawie oceny klientów
Przeglądanie stron 10
Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 2 11
Register Description
DID of 2DA0h. Device 4, Function 1 contains the address registers for Integrated
Memory Controller Channel 0 and resides at DID of 2DA1h. Device 4, Function 2
contains the rank registers for Integrated Memory Controller Channel 0 and resides
at DID of 2DA2h. Device 4, Function 3 contains the thermal control registers for
Integrated Memory Controller Channel 0 and resides at DID of 2DA3h.
Device 5: Integrated Memory Controller Channel 1. Device 5, Function 0 contains
the control registers for Integrated Memory Controller Channel 1 and resides at
DID of 2DA8h. Device 5, Function 1 contains the address registers for Integrated
Memory Controller Channel 1 and resides at DID of 2DA9h. Device 5, Function 2
contains the rank registers for Integrated Memory Controller Channel 1 and resides
at DID of 2DAAh. Device 5, Function 3 contains the thermal control registers for
Integrated Memory Controller Channel 1 and resides at DID of 2DABh.
Device 6: Integrated Memory Controller Channel 2. Device 6, Function 0 contains
the control registers for Integrated Memory Controller Channel 2 and resides at
DID of 2DB0h. Device 6, Function 1 contains the address registers for Integrated
Memory Controller Channel 2 and resides at DID of 2DB1h. Device 6, Function 2
contains the rank registers for Integrated Memory Controller Channel 2 and resides
at DID of 2DB2h. Device 6, Function 3 contains the thermal control registers for
Integrated Memory Controller Channel 2 and resides at DID of 2DB3h.
2.3 Device Mapping
Each component in the processor is uniquely identified by a PCI bus address consisting
of Bus Number, Device Number and Function Number. Device configuration is based on
the PCI Type 0 configuration conventions. All processor registers appear on the PCI bus
assigned for the processor socket. Bus number is derived by the max bus range setting
and processor socket number.
Przeglądanie stron 10
1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 63 64

Komentarze do niniejszej Instrukcji

Brak uwag