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Datasheet, Volume 1 167

DDR Data Swizzling

9 DDR Data Swizzling

To achieve better memory performance and better memory timing; Intel design

performed the DDR Data pin swizzling which will allow a better use of the product

across different platforms. Swizzling has no effect on functional operation and is

invisible to the OS/SW.

However, during debug, swizzling needs to be taken into consideration; thus, swizzling

data is presented in this chapter. When placing DIMM logic analyzer, the design

engineer must pay attention to the swizzling table to perform an efficient memory

debug.

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Intel FF8062701084601 Arkusz Danych Strona 167