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Intel A2Y15AV Arkusz Danych Strona 315

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Datasheet, Volume 2 315
Processor Configuration Registers
2.21.3 ECAP_REG—Extended Capability Register
This register reports remapping hardware extended capabilities.
B/D/F/Type: 0/0/0/VC0PREMAP
Address Offset: 10–17h
Reset Value: 0000000000F010DAh
Access: RO-V, RO
Size: 64 bits
BIOS Optimal Default 00000000000h
Bit Access
Reset
Value
RST/
PWR
Description
63:24 RO 0h Reserved (RSVD)
23:20 RO 1111b Uncore
Maximum Handle Mask Value (MHMV)
The value in this field indicates the maximum supported value for
the Handle Mask (HM) field in the interrupt entry cache
invalidation descriptor (iec_inv_dsc).
This field is valid only when the IR field in Extended Capability
register is reported as set.
19:18 RO 0h Reserved (RSVD)
17:8 RO 010h Uncore
IOTLB Register Offset (IRO)
This field specifies the offset to the IOTLB registers relative to the
register base address of this remapping hardware unit.
If the register base address is X, and the value reported in this
field is Y, the address for the first IOTLB invalidation register is
calculated as X+(16*Y).
7RO-V 1b Uncore
Snoop Control (SC)
0 = Hardware does not support 1-setting of the SNP field in the
page-table entries.
1 = Hardware supports the 1-setting of the SNP field in the
page-table entries.
6RO-V 1b Uncore
Pass Through (PT)
0 = Hardware does not support pass-through translation type in
context entries.
1 = Hardware supports pass-through translation type in context
entries.
5RO 0bUncore
Caching Hints (CH)
0 = Hardware does not support IOTLB caching hints (ALH and
EH fields in context-entries are treated as reserved).
1 = Hardware supports IOLTB caching hints through the ALH and
EH fields in context-entries.
4RO 0h Reserved (RSVD)
3RO-V 1b Uncore
Interrupt Remapping Support (IR)
0 = Hardware does not support interrupt remapping.
1 = Hardware supports interrupt remapping.
Implementations reporting this field as set must also support
Queued Invalidation (QI).
2RO 0bUncore
Device IOTLB Support (DI)
0 = Hardware does not support device-IOTLBs.
1 = Hardware supports Device-IOTLBs.
Implementations reporting this field as set must also support
Queued Invalidation (QI).
1RO-V 1b Uncore
Queued Invalidation Support (QI)
0 = Hardware does not support queued invalidations.
1 = Hardware supports queued invalidations.
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LG LD-2157LH manuels

Manuels d'utilisation et guides de l'utilisateur pour Lave-vaisselle LG LD-2157LH.
Nous fournissons des manuels en pdf 1 LG LD-2157LH à télécharger gratuitement par type de document : Manuel de l'utilisateur


Lg LD-2157LH Manuel de l'utilisateur (24 pages)


marque: Lg | Catégorie: Dishwashers | Taille: 1.38 MB |

 

Table des matières

DISHWASHER

1

CONTENTS

2

SAFETY AND CAUTION

3

INSTALLING INSTRUCTIONS

5

INSTALLATION INSTRUCTIONS

6

PARTS NAME

9

FUNCTION OF CONTROL BUTTON

10

HOW TO USE AND OPERATE

12

OPERATING SEQUENCE

19

Auto Wash

20

Intensive Wash

20

Quick Wash

20

Eco Wash

20

Pre-wash

20

Upper spray arm

21

TROUBLE SHOOTING GUIDE

22

P/No.: MFL30149791

24




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