Intel IXP46X Instrukcja Użytkownika Pobierz pdf (Strona 83)

Intel

IXP45X and Intel

IXP46X Product Line of Network Processors

February 2007 HDD

Document Number: 305261, Revision: 004 83

DDR-SDRAM—Intel

IXP45X and Intel

IXP46X Product Line of Network Processors

Figure 33. DDR-Data-to-DQS-Write Timing Parameters

Table 31. DDR Data to DQS Write Timing Parameters

Symbol Parameter Min Max Units Notes

IXP45X/IXP46X network processors output valid for data

group signals prior to the transition of DQS

1.0 ns 1

IXP45X/IXP46X network processors output hold time for

data group signals after the transition of DQS

1.0 ns 1

Required data group input setup time at DDR memory

device

0.5 ns 1

Required data group input hold time at DDR memory

device

0.5 ns 1

Allowable setup time difference between IXP45X/IXP46X

network processors data group output and setup time

required by DDR memory device

0.5 ns 1

Allowable hold time difference between IXP45X/IXP46X

network processors data group output and hold time

required by DDR memory device

0.5 ns 1

Notes:

1. Data group signals consist of DDRI_DM[4:0], DDRI_DQ[31:0], and DDRI_CB[7:0]

Figure 34. DDR-Clock-to-DQS-Write Timing Parameters

DQS

Data Valid

Data

B3990-001

DDR_M_CLK

DQS

B3991-001

1 2 ... 78 79 80 81 82 83 84 85 86 87 88 ... 107 108

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