Intel IXF1104 podręczniki

Intel IXF1104 Instrukcja Użytkownika (231 strony)

Marka: Intel | Kategoria: Płyty główne | Rozmiar: 3.18 MB |

Angielski

Spis treści

Media Access Controller

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2 Datasheet

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Document Number: 278757

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Revision Number: 009

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Revision Date: 27-Oct-2005

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Revision History

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Contents

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Datasheet 13

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14 Datasheet

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Datasheet 15

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16 Datasheet

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Datasheet 17

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18 Datasheet

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Datasheet 19

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1.0 Introduction

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2.0 General Description

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Datasheet 22

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3.1 Ball Assignments

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3.2 Ball List Tables

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Datasheet 25

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26 Datasheet

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Datasheet 27

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28 Datasheet

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Datasheet 29

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30 Datasheet

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Datasheet 31

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32 Datasheet

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Datasheet 33

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34 Datasheet

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Datasheet 35

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36 Datasheet

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4.1 Naming Conventions

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4.2 Interface Signal Groups

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4.3 Signal Description Tables

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Datasheet 40

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41 Datasheet

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Datasheet 42

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43 Datasheet

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Datasheet 44

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45 Datasheet

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Datasheet 46

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47 Datasheet

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Datasheet 48

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49 Datasheet

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Datasheet 50

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51 Datasheet

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Datasheet 52

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53 Datasheet

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Datasheet 54

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Datasheet 56

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4.4 Ball Usage Summary

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Datasheet 60

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4.6 Ball State During Reset

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Datasheet 62

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4.7 Power Supply Sequencing

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4.9 Analog Power Filtering

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65 Datasheet

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Table 21. Analog Power Balls

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5.0 Functional Descriptions

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5.1.1.3.4 Filter VLAN Packets

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5.1.1.4 CRC Error Detection

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5.1.2.1.1 Pause Frame Format

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• OpCode of 00-01

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• Length/Type field of 88-08

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B3234-01

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5.1.3.1 Configuration

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• Per-Port Registers

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• Global Registers

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5.1.4 Fiber Mode

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5.1.4.3 Fiber Forced Mode

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5.1.5.1 Speed

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5.1.5.2 Duplex

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5.1.6.1 Rx Statistics

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5.1.6.2 TX Statistics

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5.1.7.1.1 TX FIFO

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5.1.7.1.2 RX FIFO

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81 Datasheet

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5.1.8.1 Conventions

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5.2 SPI3 Interface

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Data Path

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5.2.2.1 Transmit Timing

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5.2.2.2 Receive Timing

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B0660-02

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5.2.2.3 Clock Rates

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5.2.2.4 Parity

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5.2.2.5 SPHY Mode

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5.2.2.5.1 Data Path

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• TMOD[1:0]

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• RMOD[1:0]

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89 Datasheet

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5.2.2.8.1 Clock Rates

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5.2.2.8.2 Parity

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5.2.2.9 SPI3 Flow Control

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5.2.3 Pre-Pending Function

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IXF1104

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Quad PHY Device

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95 Datasheet

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5.4.2 Timing Specifics

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5.4.3 TX_ER and RX_ER Coding

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Valid Frame

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Frame with Error

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5.4.3.1 In-Band Status

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• RXDV = true

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5.5.1 MDIO Address

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5.5.3 Clear When Done

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5.5.4 MDC Generation

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5.5.5 Management Frames

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5.5.7 MDI State Machine

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Datasheet 102

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Figure 22. MDI State

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• Data frequency of 1.25 GHz

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.5 x 10 mA = 5 mA

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5.6.2.4 Selective Power-Down

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Frequency

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Sinusoidal Jitter Mask

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Peak-to-Peak Amplitude (UI)

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• High-Speed Serial Interface

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5.7.2 Functional Descriptions

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5.7.3.1 I

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C Control and Data Registers

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5.7.3.2 I

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C Read Operation

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5.7.3.3 I

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C Write Operation

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5.7.3.6.1 Start Condition

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5.7.3.6.2 Stop Condition

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5.7.3.6.3 Acknowledge

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5.7.3.6.4 Memory Reset

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5.7.3.6.5 Device Addressing

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5.8 LED Interface

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1 22 23 24 25 26 27 28 29 30

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13534333231302928272625234

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LED_DATA

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LED_LATCH

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5.8.6.1.1 Fiber LED Behavior

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5.9 CPU Interface

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5.9.1 Functional Description

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5.9.1.3 CPU Timing Parameters

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5.10 TAP Interface (JTAG)

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5.11 Loopback Modes

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SPI3 Internal Loopback

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5.12 Clocks

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5.12.3 RGMII Clocks

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5.12.4 MDC Clock

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5.12.5 JTAG Clock

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5.12.6 I

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5.12.7 LED Clock

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6.0 Applications

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6.2.1 Disable Port Sequence

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6.2.2 Enable Port Sequence

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• 2.5 V CMOS

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• 3.3 V LVTTL

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• SerDes

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Ω; 20% to

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Datasheet 136

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Table 45. RGMII Power

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137 Datasheet

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Datasheet 138

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139 Datasheet

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Datasheet 140

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(at Transmitter)

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(at Receiver)

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B0634-01

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143 Datasheet

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Datasheet 144

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7.6.3 MDIO AC Timing

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7.7 Optical Module and I

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C AC Timing Specification

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Datasheet 148

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Table 53. I

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Datasheet 150

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TxPauseAdd[1:0]

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TxPauseFr

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8.0 Register Set

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8.3 Per Port Registers

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8.4 Register Map

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157 Datasheet

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Datasheet 158

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Datasheet 160

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8.4.1 MAC Control Registers

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Datasheet 166

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167 Datasheet

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Datasheet 168

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Datasheet 170

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171 Datasheet

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Datasheet 172

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173 Datasheet

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Name Description Address Type

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Default

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175 Datasheet

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Datasheet 176

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177 Datasheet

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179 Datasheet

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Datasheet 180

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8.4.4 PHY Autoscan Registers

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Datasheet 182

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183 Datasheet

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Datasheet 184

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185 Datasheet

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Datasheet 186

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187 Datasheet

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189 Datasheet

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191 Datasheet

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Datasheet 192

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Table 112. JTAG ID ($0x50C)

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Datasheet 196

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197 Datasheet

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Bit Name Description Type

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Register Description:

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Datasheet 200

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201 Datasheet

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Datasheet 202

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Datasheet 204

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205 Datasheet

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Datasheet 206

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Datasheet 208

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209 Datasheet

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Datasheet 210

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8.4.8 MDIO Register Overview

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Datasheet 212

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8.4.9 SPI3 Register Overview

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Datasheet 214

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215 Datasheet

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Datasheet 216

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217 Datasheet

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Datasheet 218

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219 Datasheet

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221 Datasheet

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9.0 Mechanical Specifications

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9.3 Package Information

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B0555-01

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Seating Plane

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TOP VIEW

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BOTTOM VIEW

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Datasheet 228

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Datasheet 230

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231 Datasheet

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