Intel NETWORK PROCESSOR IXP2800 Instrukcja Użytkownika Pobierz pdf (Strona 410)

410 Hardware Reference Manual

Intel

IXP2800 Network Processor

Performance Monitor Unit

11.4.6.7 ME01 Events Target ID(100001) / Design Block #(1001)

12 ME_FIFO_DEQ P_CLK single separate Command FIFO Dequeue

13 ME_FIFO_NOT_EMPTY P_CLK single separate Command FIFO not empty

Note:

1. All the Microengine have the same event list.

2. CC_Enable bit[2:0] is PMU_CTX_Monitor in Microengine CSR, This field holds the number of context to be monitored. The

event count only reflects the events that occur when this context is executing.

CC_Enable[2:0] = 000, select context number 0,

CC_Enable[2:0] = 001, select context number 1,

.......

CC_Enable[2:0] = 111, select context number 7.

3. 1.4 GHz events are sampled by the PMU at a 700 MHz rate. For this reason, all 1.4 GHz events have both an even and an odd

event. To determine the total number of 1.4 GHz events, the occurrences of the even events and odd events should be added

together.

4. For IXP2800 Network Processor Rev B, CC_Enable[3] must be set to 1 on all 16 Microengines for proper PMU functionality.

Table 160. ME00 PMU Event List (Sheet 2 of 2)

Table 161. ME01 PMU Event List

Event

Number

Event Name

Clock

Domain

Pulse/

Level

Burst Description